1. Field
Example embodiments relate to apparatuses and methods that may program data in memory devices. Additionally, example embodiments relate to multi-bit (multi-level) programming apparatuses and methods that may program data in multi-level memory devices.
2. Description of Related Art
A single-level cell (SLC) memory device may store one bit of data in a single memory cell. The SLC memory may be referred to as a single-bit cell (SBC) memory. The SLC memory may store and read data of one bit at a voltage level included in one of two voltage distributions that may be divided by a threshold voltage level programmed in a memory cell. The programmed threshold voltage may have a distribution within a certain range due to a fine electric characteristic difference between the SLC memories. For example, when a voltage level read from the memory cell is greater than 0.5V and less than 1.5V, it may be determined that the data stored in the memory cell has a logic value of “1”. When the voltage level read from the memory cell is greater than 2.5V and less than 3.5V, it may determined that the data stored in the memory cell has a logic value of “0”. The data stored in the memory cell may be classified depending on the difference between cell currents and/or cell voltages during the reading operations.
A multi-level cell (MLC) memory device, which may store data of two or more bits in a single memory cell, has been proposed in response to a need for higher integration of memory. The MLC memory device may also be referred to as a multi-bit cell (MBC) memory. However, as the number of bits stored in a single memory cell increases, reliability may deteriorate and read-failure rates may increase. To store ‘m’ bits in a single memory cell, 2m voltage level distributions may be required. But, since the voltage window for a memory device may be limited, the difference in threshold voltages between adjacent bits may decrease as ‘m’ increases, which may cause the read-failure rate to increase. For this reason, it may be difficult to improve storage density using the MLC memory device according to conventional art.